AVX-512

AVX-512, short for Advanced Vector Extensions 512, is an x86 instruction set extension that does single instruction, multiple data (SIMD) operations on 512-bit registers. It is a family of subsets, so support varies by chip. Within Xeon 6, Intel supports it only on processors with P-cores. The E-core Xeon 6 parts do not have it. AMD added it with Zen 4, on EPYC 9004.

AMD's EPYC 9004 guide says Zen 4 implements AVX-512 by double-pumping its 256-bit datapath, two halves on sequential clock cycles. AMD states this causes no drop in effective frequency and no rise in power draw, and it includes BFLOAT16 and VNNI support. The EPYC 9005 datasheet describes full 512-bit data paths in its cores. The 9755 has 128 cores at 500 W, and the 9965, built on Zen 5c, has 192 cores. The Threadripper PRO 9995WX lists AVX512, with 96 cores at 350 W.

Check the exact CPU model before assuming AVX-512 for a software requirement. Do not buy a Xeon 6 E-core part for code that needs it.

Sources

Last verified October 30, 2026.