FP6
FP6 is a 6-bit floating point format in two layouts, E2M3 and E3M2, that the OCP Microscaling (MX) specification uses for MXFP6.
FP6 is a 6-bit floating point format for neural network weights and activations. The Open Compute Project's Microscaling Formats (MX) specification, version 1.0 from September 2023, defines two layouts: E2M3 with 2 exponent bits and 3 mantissa bits, and E3M2 with 3 exponent bits and 2 mantissa bits, each plus a sign bit. Neither encodes infinity or NaN. MXFP6 groups 32 values and shares one 8-bit E8M0 scale across them, which works out to 6.25 bits per value.
E2M3 tops out at plus or minus 7.5 and E3M2 at plus or minus 28.0, so E2M3 buys precision and E3M2 buys range. NVIDIA's HGX B200 and HGX B300 spec tables list FP8 and FP6 on one line, 72 PFLOPS for eight GPUs on the sparse basis, where dense is half. FP4 is listed at 144 PFLOPS. CUDA's math library has __nv_fp6_e2m3 and __nv_fp6_e3m2 types. At MXFP6's 6.25 bits, a 70 billion parameter model needs about 55 GB for weights, against 70 GB at FP8.
Pick FP6 when FP4 loses too much accuracy and the model does not fit at FP8. The spec tables give FP6 the FP8 rate, so it saves memory but not time. Confirm the serving stack reads MXFP6 checkpoints before ordering around it.
Sources
Source | Publisher |
|---|---|
Open Compute Project | |
NVIDIA | |
NVIDIA |
- Publisher
Open Compute Project
- Publisher
NVIDIA
- Publisher
NVIDIA
Last verified October 30, 2026.
- FP6
- MXFP6
- FP6 E2M3
- FP6 E3M2
- 6-bit floating point
- OCP microscaling formats
- MX FP6 Blackwell
- FP8 FP6 tensor core
- E8M0 scale
- low precision inference