HBM

HBM, short for high bandwidth memory, stacks multiple DRAM dies vertically beside the processor. It connects through a silicon interposer instead of a normal circuit board trace. That short, very wide path moves data at much lower energy per bit than a DDR5 module. A 1,024 bit HBM stack interface is 16 times wider than a DDR5 module, per Micron.

Samsung lists HBM3 at 6.4 Gb/s per pin and 819 GB/s per stack, and HBM3E at up to 9.2 Gb/s and 1,180 GB/s. Its HBM4 doubles the interface to 2,048 pins at up to 13 Gb/s and 3,300 GB/s. HBM4E reaches 16 Gb/s and 4 TB/s per stack. AMD rates its 12-channel EPYC 9965 at 614 GB/s per socket with DDR5-6400, about 51 GB/s per channel. One HBM4 stack lists over five times that socket's bandwidth. AMD's MI455X carries 432 GB of HBM4 in 12 stacks at up to 23.3 TB/s, about 1.9 TB/s per stack.

HBM is part of the processor package, so capacity is set at purchase. Compare accelerators on HBM capacity per GPU first, since a model that does not fit cannot run from HBM. Then compare bandwidth in TB/s and the HBM generation, and confirm whether the quoted figure is a peak rating.

Sources

Last verified October 7, 2026.