IOMMU
An IOMMU translates device DMA addresses and restricts the memory a device can reach, which lets a PCIe device be assigned to a virtual machine.
An IOMMU, or input-output memory management unit, is a hardware block that translates the addresses a device uses for direct memory access (DMA) and limits which memory the device can touch. Intel's version is VT-d, Virtualization Technology for Directed I/O. AMD's is AMD-Vi. Firmware lists the units in ACPI tables, DMAR on Intel and IVRS on AMD. With one active, a hypervisor can assign a PCIe device such as a GPU to a virtual machine, and the guest cannot write over host memory.
Linux sorts devices into IOMMU groups, the smallest set the hardware can isolate from everything else, and VFIO assigns a whole group at a time. Groups get wider behind a PCIe-to-PCI bridge or a bridge without ACS, Access Control Services. If a group holds several devices, each must be bound to a VFIO driver first. On Intel, interrupt addresses from 0xfee00000 to 0xfeefffff are not translated. Intel publishes VT-d as document D51397, revision 5.20 dated April 2026, and AMD publishes its IOMMU specification as document 48882.
Enable VT-d or AMD-Vi in the BIOS before building a passthrough host. Then read the group layout on the actual board. A GPU sharing a group with a USB or SATA controller moves with it.
Sources
Source | Publisher |
|---|---|
Intel Virtualization Technology for Directed I/O Architecture Specification, Rev. 5.20 | Intel |
Linux kernel documentation | |
Linux kernel documentation | |
Microsoft Learn |
- Publisher
Intel
- Publisher
Linux kernel documentation
- Publisher
Linux kernel documentation
- Publisher
Microsoft Learn
Last verified October 30, 2026.
- IOMMU
- input-output memory management unit
- VT-d
- Intel VT-d
- AMD-Vi
- AMD IOMMU
- IOMMU groups
- DMA remapping
- VFIO
- ACS